kingston 2gb

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kingston 2gb
Posting date : Jun 21, 2010
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HS-CODE
85-
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Kingston 2gb 1)DDR 400/333&533/667/800 MHZ 2)168/184/240-pen socket type dual in line memory module(DIMM) 3)2.6V power supply 4) Date rate:400/333/533/667/800mbps(max.) 5)2.5V(SSTL-2 compatible)I/O for DDR I products,1.8V power supply for DDR II products 6)Double-fate-rate architecture, two date transfers per clocl cycle 7)Bi-directional, differential data strobe(DQS) is transmitted/received with data, to be used in capturing data at the receiver 8)Data inputs and outputs are synchronized with DQS 9)DQS is edge alihned with data for read , center aligned with data for write 10) Differential clock inputs(CK and CK) 11)DLL aligns DQ and DQS transititions with CK transitions 12)Commands entered in each positive CK edge:data and data mask referenced to both edges of DQS 13)Four internal banks for concurrent operation(component) 14)Data mask (DM) for write data 15) Auto precharge option for each burst access 16)Programmable bursrt length:2,4,8 17)Programmable/CAS latency(CL):3 18)Programmable output driver strength: normal19)Refresh cycles:(8192 refresh cycles/64ms) 20)7.8US maximum average periodic refresh interval 21)Posted CAS by programmable additive latency for better command and data bus efficiency 22)Off-chip-drive impedance adjustment and on-dieptermination for better signal quality 23)DQS can be disabled for single-ended data strobe operation 24)2 variations of refresh 25) Auto refresh 26) Self refresh

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