CPLD/FPGA experiment development system

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CPLD/FPGA experiment development system
Posting date : Jun 30, 2008
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Free Member Scince May 31, 2008
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84-
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It allocates CPLD/PFGA apparatus and isp single chip. This system can compatible various CPLD/FPGA ships of companies such as Lattice and Xilinx. This box allocates digitron, A/D and D/A converter, universal keyboard, interface of single chip microcomputer, expandable interface, 128×64 character mode lcd, alternative 16×16 lattice voice module of in/output, VGA interface, USB interface, PS/2 interface, and interface of parallel communication. Experimental objects: ⒈the design of logic circuit and simulation. 2. The design of decoding and register circuit and simulation. 3. The design of full adder, and its simulation and download. 4. The design of frequency dividing circuit. 5. Using hardware description language to design of digital clock. 6. The design of serial scan display. 7. The design of complex clock and scan display. 8. The design of conversion circuit of BCD code. 9. Data collection and the design of serial display. 10 The design of eight bits divider. 11. The design of finite state machine of Moore model. 12. The design of keyboard scan display of 4×4 aligned array. 13. The design of 4×4 multiplier, and using LPM. 14. Using FPGA to achieve function waveform generator. 15. Serial communication including FPGA. 16. The design of digital system and experimental interface of single chip microcomputer. (1).Experiment of shift register. 17. The design of digital system and experimental interface of single chip microcomputer. (2).Outside RAM reading and writing of single chip microcomputer. 18. The design of digital system and experimental interface of single chip microcomputer. (3). A/D transition experiment. 19. The design of digital system and experimental interface of single chip microcomputer. (4).D/A transition experiment. 20. The design of digital system and experimental interface of single chip microcomputer. (5).Keyboard interface experiment. 21. FPGA and computable duplex communication experiment. 22. FPGA and computable port communication experiment. 23. The design of musical performance circuit experiment. 24. The design of musical recording and playing circuit experiment. 25. synthetical experiment of Music editor. 26. VGA display design. 27. Experiment of lattice display design. 28. The design of liquid crystal display experiment. Main Technical Indexes: Working power: unidirectional three line AC220V±10% 50Hz Dimension of whole machine: 470×345×153mm The whole machine use hot air leveling technology substrate and produced full patch machine, which is reliable and stable.

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